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 NLAS5213 1 W RON DPST and Dual SPST Switches
The NLAS5213A and NLAS5213B are DPST and Dual SPST devices, respectively. They each consist of 2 single throw switches and are both designed for audio applications within portable devices. The NLAS5213A is controlled with a single enable pin while the NLAS5213B has two independent enables. Both the NLAS5213A and NLAS5213B operate over a wide VCC range, 1.65 V to 4.5 V, and maintain a very low RON: 1.3 W Max @ VCC = 4.2 V. Each is available in a choice of two packages: US8 and UDFN8.
Features http://onsemi.com MARKING DIAGRAM
8 8 1 US8 US SUFFIX CASE 493 1 8 1 UDFN8 MU SUFFIX CASE 517AJ XXMG G
* * * * * *
PST and Dual SPST Pinouts RON: 1.3 W Max @ VCC = 4.2 V VCC Range: 1.65 V to 4.5 V 8 kV Human Body Model ESD on I/O to GND UDFN8 or US8 Packages Available These are Pb-Free Devices
XXM G
Typical Applications
* Mobile Phones * Portable Devices
XX M G
= Device Code = Date Code = Pb-Free Package
(Note: Microdot may be in either location)
APPLICATION DIAGRAM
CODEC
NLAS5213
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the package dimensions section on page 9 of this data sheet.
(c) Semiconductor Components Industries, LLC, 2009
January, 2009 - Rev. 2
1
Publication Order Number: NLAS5213/D
NLAS5213
NO1
1
8
COM1
NO1
1
8
COM1
IN
2
7
GND
IN1
2
7
GND
N.C.
3
6
VCC
IN2
3
6
VCC
NO 2
4
5
COM2
NO 2
4
5
COM2
NLAS5213A
NLAS5213B
Figure 1. Functional Block Diagram Pinouts (UDFN8)
COM1
1
8
NO1 COM1
1
8
NO1
GND
2
7
IN
GND
2
7
IN1
VCC
3
6
N.C.
VCC
3
6
IN2
COM2
4
5
NO2 COM2
4
5
NO2
NLAS5213A
NLAS5213B
Figure 2. Functional Block Diagram Pinouts (US8)
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2
NLAS5213
NLAS5213A
Pin # UDFN8 1 2 3 4 5 6 7 8 US8 8 7 6 5 4 3 2 1 Name NO1 IN N.C. NO2 COM2 VCC GND COM1 Direction I/O Input N/A I/O I/O Input Input I/O Description Normally Open Signal Line of Switch 1 Control Input No Connect Normally Open Signal Line of Switch 2 Common Signal Line of Switch 2 Analog Supply Voltage Ground Common Signal Line of Switch 1
NLAS5213B
Pin # UDFN8 1 2 3 4 5 6 7 8 US8 8 7 6 5 4 3 2 1 Name NO1 IN1 IN2 NO2 COM2 VCC GND COM1 Direction I/O Input Input I/O I/O Input Input I/O Description Normally Open Signal Line of Switch 1 Control Input of Switch 1 Control Input of Switch 2 Normally Open Signal Line of Switch 2 Common Signal Line of Switch 2 Analog Supply Voltage Ground Common Signal Line of Switch 1
NLAS5213A FUNCTION TABLE
IN 0 1 NO1, NO2 OFF ON
NLAS5213B FUNCTION TABLE
IN 0 1 NO1, NO2 OFF ON
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3
NLAS5213
OPERATING CONDITIONS
MAXIMUM RATINGS
Symbol VCC VIS VIN ICC IIS_CON IIS_PK IIN TSTG Pins VCC NOx, NCx, COMx IN1, IN2 VCC NOx, NCx, COMx NOx, NCx, COMx IN Parameter Positive DC Supply Voltage Analog Signal Voltage Control Input Voltage Positive DC Supply Current Analog Signal Continues Current Analog Signal Peak Current Control Input Current Storage Temperature Range Value -0.5 to 5.5 -0.5 to VCC + 0.5 -0.5 to 5.5 50 300 500 20 -65 to 150 Closed Switch 10% Duty Cycle Condition Unit V V V mA mA mA mA C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
RECOMMENDED OPERATING CONDITIONS*
Symbol VCC VIS VIN TA Pins VCC NOx, NCx, COMx IN1, IN2 Parameter Positive DC Supply Voltage Analog Signal Voltage Control Input Voltage Operating Temperature Range Value 1.65 to 4.5 0 to VCC 0 to VCC -40 to 85 Condition Unit V V V C
Minimum and maximum values are guaranteed through test or design across the Recommended Operating Conditions, where applicable. Typical values are listed for guidance only and are based on the particularconditions listed for each section, where applicable. These conditions are valid for all values found in the characteristics tables unless otherwise specified in the test conditions.
ESD PROTECTION
Symbol ESD Human Body Model I/O to GND All Pins Parameter Value 8.0 4.0 Unit kV
DC ELECTRICAL CHARACTERISTICS
CONTROL INPUT (Typical: T = 25C, VCC = 3.3 V)
-40C to +85C Symbol VIH Pins OE Parameter Control Input HIGH Voltage Test Conditions VCC (V) 2.7 3.3 4.2 2.7 3.3 4.2 0 VIS VCC 1.65 - 4.5 Min 1.4 1.7 2.3 - Typ - Max - Unit V
VIL
OE
Control Input LOW Voltage
-
0.5 0.5 0.8 1.0
V
IIN
OE
Control Input Leakage Current
-
-
mA
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4
NLAS5213
SUPPLY CURRENT AND LEAKAGE (Typical: T = 25C, VCC = 3.3 V)
-40C to +85C Symbol ICC ICCT IOZ IOFF D+, D- Pins VCC VCC Parameter Quiescent Supply Current Increase in ICC per Control Voltage OFF State Leakage Power OFF Leakage Current Test Conditions VIS = VCC or GND; ID = 0 A VIN = 2.6 V 0 VIS VCC 0 VIS VCC VCC (V) 1.65 - 4.5 3.6 1.65 - 4.5 0 Min - - - - Typ - - - - Max 1.0 10.0 1.0 1.0 Unit mA mA mA mA
ON RESISTANCE (Typical: T = 25C, VCC = 3.3 V)
-40C to +85C Symbol RON Pins Parameter On-Resistance Test Conditions ION = -100 mA VIS = 0 to VCC ION = -100 mA VIS = 0 to VCC ION = -100 mA VIS = 0 to VCC VCC (V) 2.7 3.3 4.2 2.7 3.3 4.2 2.7 3.3 4.2 Min - Typ Max 2.0 1.4 1.3 0.32 0.35 0.37 0.16 0.16 0.15 - Unit W
RFLAT
On-Resistance Flatness
-
W
DRON
On-Resistance Matching
-
-
W
AC ELECTRICAL CHARACTERISTICS
TIMING/FREQUENCY (Typical: T = 25C, VCC = 3.3 V, RL = 50 W, CL = 5 pF, f = 1 MHz)
-405C to +855C Symbol tON tOFF BW Pins Parameter Test Conditions VCC (V) 1.65 - 4.5 1.65 - 4.5 CL = 5 pF 1.65 - 4.5 Min - - - Typ 20 15 496 Max - - - Unit ns ns MHz Closed Turn-ON Time to Open Open to Turn-OFF Time Closed -3 dB Bandwidth
ISOLATION (Typical: T = 25C, VCC = 3.3 V, RL = 50 W, CL = 5 pF, f = 1 MHz)
-405C to +855C Symbol OIRR XTALK Pins Open HSD+, HSD- Parameter OFF-Isolation Non-Adjacent Channel Crosstalk Test Conditions VCC (V) 1.65 - 4.5 1.65 - 4.5 Min - - Typ -57 -97 Max - - Unit dB dB
CAPACITANCE (Typical: T = 25C, VCC = 3.3 V, RL = 50 W, CL = 5 pF, f = 1 MHz)
-405C to +855C Symbol CIN CON COFF Pins OE HSD+, to D+ HSD+, HSD- ON Capacitance OFF Capacitance Parameter Control Pin Input Capacitance Test Conditions VCC = 0 V VIN = 0 V VIS = 3.3 V; VIN = 3.3 V Min - - - Typ 8.5 32 19 Max - - - Unit pF pF pF
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5
NLAS5213
1.6 1.4 1.2 RDS(on) (W) RDS(on) (W) 1 0.8 0.6 0.4 0.2 0 0 0.4 0.8 1.2 Vin (V) 1.6 2 2.4 -40C 85C 25C 1.6 1.4 1.2 1 0.8 0.6 0.4 0.2 0 0 0.4 0.8 1.2 1.6 Vin (V) 2 2.4 2.8 3.2 85C 25C -40C
Figure 3. RON @ VCC = 2.7 V
Figure 4. RON @ VCC = 3.3 V
1.4 85C 1.2 1 RDS(on) (W) 0.8 0.6 0.4 0.2 0 0 0.4 0.8 1.2 1.6 2 Vin (V) 2.4 2.8 3.2 3.6 4 25C -40C
Figure 5. RON @ VCC = 4.2 V
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6
NLAS5213
160 140 120 100 ICC, (mA) 80 60 40 20 0 0 0.5 1 1.5 2 2.5 3 VCC = 3.3 V VCC = 2.7 V VCC = 4.3 V
3.5
4
4.5
VIN, (V)
Figure 6. ICC vs. VIN
DUT VCC 0.1 mF 50 W Output VOUT 35 pF Input
VCC GND tBMM 50 % OF DROOP VOLTAGE DROOP
Output Switch Select Pin
Figure 7. tBBM (Time Break-Before-Make)
VCC DUT VCC 0.1 mF Open Output VOUT 50 W 35 pF Output VOL Input Input 0V VOH 50% 50%
90%
90%
Figure 8. tON/tOFF
VCC DUT Output Open 50 W VOUT 35 pF Output VOL Input Input 0V VOH VCC 50%
tON
tOFF
50%
10% tOFF tON
10%
Figure 9. tON/tOFF
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7
NLAS5213
50 W Reference Input Output 50 W Generator 50 W DUT Transmitted
Channel switch control/s test socket is normalized. Off isolation is measured across an off channel. On loss is the bandwidth of an On switch. VISO, Bandwidth and VONL are independent of the input signal direction. VISO = Off Channel Isolation = 20 Log VONL = On Channel Loss = 20 Log VOUT VIN for VIN at 100 kHz
VOUT for VIN at 100 kHz to 50 MHz VIN
Bandwidth (BW) = the frequency 3 dB below VONL VCT = Use VISO setup and test to all other switch analog input/outputs terminated with 50 W
Figure 10. Off Channel Isolation/On Channel Loss (BW)/Crosstalk (On Channel to Off Channel)/VONL
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8
NLAS5213
DEVICE ORDERING INFORMATION
Device NLAS5213AUSG NLAS5213AMUTAG NLAS5213BUSG NLAS5213BMUTAG Marking VD VD VE VE Package Type US8 (Pb-Free) UDFN8 (Pb-Free) US8 (Pb-Free) UDFN8 (Pb-Free) Shipping 3,000 / Tape & Reel 3,000 / Tape & Reel 3,000 / Tape & Reel 3,000 / Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
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9
NLAS5213
PACKAGE DIMENSIONS
US8 CASE 493-02 ISSUE B
A
8 5
-X- -Y- J
DETAIL E B L
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION "A" DOES NOT INCLUDE MOLD FLASH, PROTRUSION OR GATE BURR. MOLD FLASH. PROTRUSION AND GATE BURR SHALL NOT EXCEED 0.140 MM (0.0055") PER SIDE. 4. DIMENSION "B" DOES NOT INCLUDE INTER-LEAD FLASH OR PROTRUSION. INTER-LEAD FLASH AND PROTRUSION SHALL NOT E3XCEED 0.140 (0.0055") PER SIDE. 5. LEAD FINISH IS SOLDER PLATING WITH THICKNESS OF 0.0076-0.0203 MM. (300-800 "). 6. ALL TOLERANCE UNLESS OTHERWISE SPECIFIED 0.0508 (0.0002 "). MILLIMETERS MIN MAX 1.90 2.10 2.20 2.40 0.60 0.90 0.17 0.25 0.20 0.35 0.50 BSC 0.40 REF 0.10 0.18 0.00 0.10 3.00 3.20 0_ 6_ 5_ 10 _ 0.23 0.34 0.23 0.33 0.37 0.47 0.60 0.80 0.12 BSC INCHES MIN MAX 0.075 0.083 0.087 0.094 0.024 0.035 0.007 0.010 0.008 0.014 0.020 BSC 0.016 REF 0.004 0.007 0.000 0.004 0.118 0.126 0_ 6_ 5_ 10 _ 0.010 0.013 0.009 0.013 0.015 0.019 0.024 0.031 0.005 BSC
1
4
R
P
G
S U
C -T-
SEATING PLANE
D 0.10 (0.004)
K
M
0.10 (0.004) T N TXY V
H R 0.10 TYP
M
DIM A B C D F G H J K L M N P R S U V
DETAIL E
F
SOLDERING FOOTPRINT*
3.8 0.15 0.50 0.0197 1.8 0.07 0.30 0.012 1.0 0.0394
SCALE 8:1 mm inches
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
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10
NLAS5213
PACKAGE DIMENSIONS
UDFN8 1.8x1.2, 0.4P CASE 517AJ-01 ISSUE O
D 0.10 C
PIN ONE REFERENCE
AB L1 DETAIL A
NOTE 5
E
0.10 C
TOP VIEW (A3) A
NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.30 mm FROM TERMINAL TIP. 4. MOLD FLASH ALLOWED ON TERMINALS ALONG EDGE OF PACKAGE. FLASH MAY NOT EXCEED 0.03 ONTO BOTTOM SURFACE OF TERMINALS. 5. DETAIL A SHOWS OPTIONAL CONSTRUCTION FOR TERMINALS. DIM A A1 A3 b b2 D E e L L1 L2 MILLIMETERS MIN MAX 0.45 0.55 0.00 0.05 0.127 REF 0.15 0.25 0.30 REF 1.80 BSC 1.20 BSC 0.40 BSC 0.45 0.55 0.00 0.03 0.40 REF
0.05 C 0.05 C
(b2)
(L2)
8 5 8X b
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative
EEE EEE
e/2
1
SIDE VIEW
A1
C
SEATING PLANE
e
4
DETAIL A 8X
L
SOLDERING FOOTPRINT*
BOTTOM VIEW CAB C
NOTE 3 7X
0.10 0.05
M M
0.22
0.66
8X
1.50 1 0.32 0.40 PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
11
NLAS5213/D


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